- Rekhi Hall 207
- Professor and Chair, Computer Science
- PhD, Computer Science,University of Massachusetts, 2003
Zhenlin Wang received his BS degree in 1992 and MS degree in 1995 both in Computer Science and from Peking University, China. He received his PhD in Computer Science in 2004 from the University of Massachusetts, Amherst. He joined the Department of Computer Science at Michigan Technological University as an assistant professor in 2003, became an associate professor in 2009, and was promoted to a full professor in 2015. His research interests are broadly in the areas of compilers, operating systems and computer architecture with a focus on memory system optimization and system virtualization. He is a recipient of NSF career award.
Links of Interest
Area of Expertise
- Optimizing Compilers
- High Performance Architectures
- Cloud Computing
- GSpecPal: Speculation-Centric Finite State Machine Parallelization on GPUs, Y Wang, R Watling, J Qiu, Z Wang, 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS’22), May 30-June 3, 2022, Lyon, France
- Accelerating Address Translation for Virtualization by Leveraging Hardware Mode, S Sha, Y Zhang, Y Luo, X Wang, Z Wang, IEEE Transactions on Computers
- GRAPHSPY: Fused Program Semantic Embedding through Graph Neural Networks for Memory Efficiency, Y Guo, P Li, Y Luo, X Wang, Z Wang, 58th ACM/IEEE Design Automation Conference (DAC), 1045-1050, Dec. 2021
- Efficient Modeling of Random Sampling-Based LRU, J Yang, Y Wang, Z Wang 50th International Conference on Parallel Processing (ICPP’21), 1-11, August 2021
- Penalty-and locality-aware memory allocation in Redis using enhanced AET, C Pan, X Wang, Y Luo, Z Wang, ACM Transactions on Storage (TOS) 17 (2), 1-45, May 2021
- Swift shadow paging (SSP): no write-protection but following TLB flushing, S Sha, Y Zhang, Y Luo, X Wang, Z Wang, Proceedings of the 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (VEE’21), April, 2021
- Dynamically Configuring LRU Replacement Policy in Redis, Y Wang, J Yang, Z Wang, The International Symposium on Memory Systems (MemSys’20), 272-280, Sept. 2020
- Huge page friendly virtualized memory management, S Sha, JY Hu, YW Luo, XL Wang, Z Wang, Journal of Computer Science and Technology 35 (2), 433-452
- pRedis: Penalty and Locality Aware Memory Allocation in Redis, Cheng Pan, Yingwei Luo, Xiaolin Wang, and Zhenlin Wang, Proceedings of the ACM Symposium on Cloud Computing (SoCC '19), Nov. 20-22, Santa Cruz, CA.
- Faster Slab Reassignment in Memcached, Daniel Byrne, Nilufer Onder and Zhenlin Wang, Proceedings of the 2019 International Symposium on Memory Systems (MemSys '19), Washington DC, Sept. 30-Oct. 3, 2019
- Machine Learning for Fine-Grained Hardware Prefetcher Control, Jason Hiebel, Laura Brown, and Zhenlin Wang, Proceedings of the 48h International Conference on Parallel Processing (ICPP’19), Kyoto, Japan, Aug. 5-8, 2019.
- EMBA: Efficient Memory Bandwidth Allocation to Improve Performance on Intel Commodity Processor, Yaocheng Xiang, Chencheng Ye, Xiaolin Wang, Yingwei Luo, and Zhenlin Wang, Proceedings of the 48h International Conference on Parallel Processing (ICPP’19), Kyoto, Japan, Aug. 5-8, 2019.